1. Field of the Invention
The invention relates generally to the removal of extrusions that form during the fabrication of integrated circuits. More particularly, the invention relates to the removal of extrusions that form on metal-oxide-semiconductor (MOS) structures.
2. Description of the Related Art
In order to improve speed and performance in semiconductor components, manufacturers typically attempt to decrease access time of various semiconductor structures located in the components by incorporating layers of materials which enhance electron flow into semiconductor structures. For example, to increase read/write speed in memory cells, such as dynamic random access memory (DRAM), semiconductor manufacturers attempt to decrease wordline access time by reducing the resistance or capacitance in a wordline. Reduction of resistance is typically achieved by layering a low-resistance conductive material over the gate in a semiconductor structure.
Some manufacturers use materials such as titanium silicide (TiSix), known for its low resistance, to form the conductive layer of a semiconductor structure. Titanium silicide, however, can become unstable during subsequent high temperature processing steps and can diffuse into the underlying gate layer (typically polysilicon), also called titanium silicide agglomeration, thereby damaging the semiconductor structure. To prevent titanium silicide agglomeration, some manufacturers cover the gate layer with a barrier layer, such as titanium nitride (TiN). Depending on the thickness of the barrier layer, however, the titanium nitride may possess a high resistance and thus detract from the low resistance effect of the conductive layer. Furthermore, during subsequent processing at high temperature and an oxygen atmosphere, titanium nitride can oxidize to form titanium oxynitride (TiOxNy).
Likewise, during subsequent processing, semiconductor structures containing metal silicide layers that may be exposed to nitrogen and oxygen rich environments at high temperature. These gases react with metal rich portions of the semiconductor structure to create metal oxynitrides. Such metal oxynitrides may expand to create extrusions which protrude outwardly from the sides of the semiconductor structure. If these extrusions contact other portions of the semiconductor, short circuits result.
To reduce the probability of short circuits resulting from extrusions, some manufacturers coat the semiconductor structure with an insulator such as a nitride spacer. While these coatings reduce the amount and extent of extrusions formed, application of such coatings is a complex and expensive process. Furthermore, these coatings may interfere with further processing steps thereby increasing manufacturing costs and decreasing semiconductor component yields.
A conductor, preferably composed of a tungsten silicide (WSix) barrier layer and a titanium silicide (TiSix) conductive layer, is disclosed for use in a semiconductor structure such as a wordline, transistor or any other structure. A novel wet etch, preferably composed of an oxidizing and chelating agent in solution, is further disclosed for selectively removing extrusions which may protrude from the conductor.
Exemplary methods of creating the conductor include sputtering tungsten silicide onto a polysilicon gate to create a tungsten silicide layer. Titanium silicide is then sputtered onto the tungsten silicide layer. Exemplary formulations of the wet etch include a combination of an oxidizing agent such as hydrogen peroxide (H2O2) in water with a quantity of a chelating agent such as ethylenediaminetetraacetic acid (EDTA). In other embodiments, the wet etch comprises water, an oxidizing agent, a chelating agent and a base such as ammonium hydroxide. In yet other embodiments, the wet etch comprises water, an oxidizing agent, a chelating agent, a base and a buffer salt such as ammonium phosphate.
One aspect of the invention relates to a method of fabricating a wordline in a memory array. The method comprises depositing a tungsten silicide barrier layer on a wordline stack and processing the wordline stack such that tungsten nitride extrusions extend from an exposed surface of the barrier layer. The method further comprises selectively etching the tungsten nitride extrusions with a solution that comprises water, hydrogen peroxide and EDTA.
Another aspect of the invention relates to a method of fabricating a wordline in a memory array. The method comprises depositing a metal silicide layer on a wordline stack and processing the wordline stack such that metal nitride extrusions extend from the metal silicide layer. The method further comprises selectively etching the metal nitride extrusions with a solution that comprises at least an oxidizing agent and a chelating agent.
An additional aspect of the invention relates to a method of fabricating a wordline in a memory array. The method comprises depositing a tungsten silicide barrier layer on a wordline stack and depositing a titanium silicide conductive layer above the tungsten silicide barrier layer. The method further comprises processing the wordline stack such that metal nitride extrusions extend from the tungsten silicide barrier layer and the titanium silicide conductive layer. The method also comprises etching the metal nitride extrusions at a faster rate than the conductive layer or the barrier layer.
One embodiment of the invention relates to a method of fabricating a semiconductor structure. The method comprises depositing a polysilicon gate on a semiconductor substrate to form a wordline stack and depositing a conductive layer comprising metal silicide above the polysilicon gate. The method further comprises processing the wordline stack in a manner that forms protrusions on the conductive layer and etching the protrusions at a faster rate than the conductive layer.
Another embodiment of the invention relates to a method of forming a wordline gate that comprises forming metal nitride extrusions on a wordline stack and selectively removing the metal nitride extrusions. An additional embodiment relates to a method of forming a semiconductor structure. The method comprises selectively removing metal oxynitride extrusions from a semiconductor structure in a manner that does not substantially damage a conductive layer in the semiconductor structure.
Yet another embodiment relates to a method of removing metal oxynitride extrusions from a semiconductor structure in a manner that does not substantially damage a polysilicon layer in the semiconductor structure. A further embodiment relates to a method of forming a wordline gate. The method comprises forming metal oxynitride extrusions on a wordline stack and selectively removing the metal oxynitride extrusions.
One aspect of the invention relates to a wet etch for selectively removing tungsten nitride extrusions that comprises at least 10% by weight hydrogen peroxide and at least 0.03% by weight EDTA. Another aspect of the invention relates to a wet etch for selectively removing metal nitride extrusions that comprises at least 10% by weight an and at least 0.03% by weight a chelating agent.
One embodiment of the invention relates to a semiconductor structure that comprises a tungsten silicide layer, wherein the tungsten silicide layer has substantially etched tungsten nitride extrusions formed thereon. Another embodiment relates to a semiconductor structure that comprises a tungsten silicide layer, wherein the tungsten silicide layer has substantially etched tungsten oxynitride extrusions thereon. An additional embodiment relates to a semiconductor structure that comprises a titanium silicide layer, wherein the titanium silicide layer has substantially etched titanium nitride extrusions thereon. Yet another embodiment relates to a semiconductor structure that comprises a titanium silicide layer, wherein the titanium silicide layer has substantially etched titanium oxynitride extrusions thereon.
Another aspect of the invention relates to a semiconductor structure that comprises a barrier layer above a semiconductor substrate, the barrier layer comprising a tungsten silicide. The semiconductor structure further comprises a conductive layer above the wordline gate, the conductive layer comprising titanium silicide. The semiconductor structure also comprises a cap above the conductive layer.
For purposes of summarizing the invention, certain aspects, advantages and novel features of the invention are described herein. It is to be understood that not necessarily all such advantages may be achieved in accordance with any particular embodiment of the invention. Thus, for example, those skilled in the art will recognize that the invention may be embodied or carried out in a manner that achieves one advantage or group of advantages as taught herein without necessarily achieving other advantages as may be taught or suggested herein.